
Add to Cart
5AGXFB3H4F35I5 Programmable Logic ICS Arria V GX 13688 LABS 544 IOs
TSMC's 28-nm process technology:
Arria V GX, GT, SX, and ST—28-nm low power (28LP) process
Arria V GZ—28-nm high performance (28HP) process
Lowest static power in its class (less than 1.2 W for 500K logic elements (LEs) at
85°C junction under typical conditions)
0.85 V, 1.1 V, or 1.15 V core nominal voltage
Thermal composite flip chip BGA packaging
Multiple device densities with identical package footprints for seamless migration
between different device densities
Leaded(1), lead-free (Pb-free), and RoHS-compliant options
Enhanced 8-input ALM with four registers
Improved routing architecture to reduce congestion and improve compilation time
M10K—10-kilobits (Kb) memory blocks with soft error correction code (ECC) ( Arria V GX, GT, SX, and ST devices only)
M20K—20-Kb memory blocks with hard ECC ( Arria V GZ devices only)
Memory logic array block (MLAB)-640-bit distributed LUTRAM where you can
use up to 50% of the ALMs as MLAB memory